Conventional television receiving systems conform to standards, such as NTSC and PAL, that have evolved since the initiation of television broadcasting. Because these standards evolved over time, these standards include, for example, modulation schemes that allow for the transmission of color images without adversely affecting the reception and reproduction of these images on televisions that are only capable of displaying images in black and white. These standards also include rasterization schemes, such as interlaced scanning, that optimize transmission bandwidth by taking advantage of the filtering effect of the human visual system.
Computer graphics systems, on the other hand, evolved long after the technology for high quality image reproduction had become available. Because of the demand for high quality and high resolution, for example, conventional computer monitors do not use the aforementioned interlaced scanning of conventional television, and can provide well over a thousand lines of resolution, compared to a convention television's 525 lines of resolution.
The delineation between video image processing, such as television, and graphics image processing, such as computer imaging, is becoming blurred. Devices are available for "set-top" use, for displaying images and text from the world-wide web on conventional televisions, and computer boards are available for displaying broadcast television within a window of a computer screen.
Standards, such as SMPTE 125 and CCIR 601, have been developed for the digital production, storage, and display of images that are substantially compatible with the display of images using NTSC and PAL rasterizing techniques, albeit at higher resolution. These standards address the number of lines per screen image (vertical resolution), the number of digital samples per line (horizontal resolution), and the number of bits per digital sample. The encodings provided by these standards are baseband encodings, and do not include, for example, the modulations that are applied for conventional NTSC or PAL raster encodings. To communicate a digital encoding of image data to a conventional television receiver, the image data must be modulated to conform to the conventional television broadcast conventions, as defined for example by the FCC. That is, for example, the FCC has allocated a maximum of 6 MHz for a television channel transmission; the color information, or chrominance, is quadrature-phase modulated about a chrominance subcarrier frequency at 4.829545 MHz; the audio information is frequency modulated about a sound center frequency at 5.75 MHz; and so on.
FIGS. 1A and 1B illustrate the use of a conventional video encoder to effect the modulation of digitally encoded image data to form raster data for communication to a conventional television. Because this invention particularly addresses the processing of video information, the figures herein are limited to the processing of image data. The myriad of other tasks performed to transmit a composite television signal, common in the art of television broadcasting, are excluded from the figures, for ease of understanding.
FIG. 1A illustrates a frame buffer 110 that is used to store and retrieve image data 101. The frame buffer 110 is conventionally a component of an image processing system (not shown) that creates the digitally encoded image data 101. The image processing system may be, for example: a computer graphics system that is used to create images; a computer system that receives images from other sources, such as the world-wide web; a digital video disc player; and the like. The image processing system typically operates at a substantially higher clock rate than conventional video systems, such as televisions; this higher clock rate is termed herein as the core clock rate, and is illustrated in FIG. 1A by the core clock signal 102. For efficient processing, the frame buffer 110 is conventionally implemented in dynamic RAM, and is designed to operate at the core clock rate. In high performance graphics processing systems, the core clock rate is over 100 MHz, and can be expected to increase as new technologies become available. The aforementioned digital image standard, CCIR 601, specifies an interface clock rate of 27 MHz for the communication of image data, corresponding to the sample rate of the image data, which consists of a luminance component at 13.5 MHz, and two chrominance components at 6.25 MHz each. In a conventional system, a rate buffer 120 is used to provide the samples from the high speed frame buffer 110 at the appropriate sample rate, in response to the sample rate clock 132. These samples are encoded for transmission using conventional television broadcast encoding techniques, common in the art. Because the image data 101 corresponds to luminance and chrominance samples at submultiples of the sample rate, and the image data 101 is extracted from the rate buffer 120 at the sample rate, the conventional video encoder 130 is typically structured to operate in a pipeline manner at the sample rate. The video encoder produces raster encoded sample data that is converted into analog form by a digital to analog converter 130.
If each high resolution line of a CCIR 601 encoded image is displayed on a conventional interlaced NTSC receiver, the additional details will produce a visually apparent flicker effect. FIG. 1B illustrates the use of a flicker filter 128 that eliminates these additional details by forming each line of image data that is provided to the video encoder 130 as a weighted average of three or four lines of the high resolution image data. The data elements corresponding to vertically adjacent image samples are separated in the frame buffer by the number of data elements per line. The extraction of data from the frame buffer 110 at a rate that is asynchronous to core clock rate incurs a substantial performance penalty. Therefore, the direct extraction of each data element corresponding to each of the three or four lines is not feasible. As illustrated in FIG. 1B, line delays 124, 125, and 126 are used to obtain each vertically adjacent data element in the high resolution image data 101. The image data 101 is extracted from the frame buffer 110 by the rate buffer 120 at the sample rate. Each sample of the image data is clocked through each of the line delays 124, 125, and 126, such that the sample appears at the output of the line delay after a number of sample rate clock cycles corresponding to the number of samples per line of image data. In this manner, the sample of the image data at 101d corresponds to a location on the image that is vertically above the location of the sample of the image data at 101c, which is vertically above the location of the sample at 101b, which is vertically above the location of the sample at 101a. The flicker filter 128 receives each sample at 101d, 101c, 101b, and 101a, and provides a weighted average of these samples to the video encoder 130 at each sample rate clock cycle. Because each line delay must be sufficiently sized to contain a full line of image data, the use of multiple line delays to effect flicker filtering can be cost or area prohibitive.
As is common in the art, cost and area efficiencies can be realized by time-sharing devices, and by allocating the available time on an as-needed basis. In time-sharing, if two identical devices each perform an operation that consumes half the available time, one of these devices may be eliminated if the two operations can be performed sequentially. In as-needed time allocation, the system is designed to provide an overall throughput rate, but individual processes may have varying performance times, depending on the particular task being performed at that time. A pipeline system, however, introduces substantial constraints on the use of time-sharing and time-allocation. A pipeline system halts if any process in the pipeline is not completed when the next clock cycle occurs; therefore, each of the processes and subprocesses, such as timeshared processes, must be synchronized to the clock to assure completion. Because the rate buffer, the video encoder, and the flicker filter, if any, are operated in a pipeline fashion, the performance of the video encoding system is limited to the speed of the slowest process in the pipeline, and limited to the rate of the sample rate clock 132.
Consequently, there exists a need for a video encoding device that operates independent of the sample rate clock, thereby providing area and cost efficiencies that are not constrained by external factors, such as sample clock rates. A need also exists for a video encoding device that can efficiently perform flicker filtering without the need for multiple line delay buffers.